80A07 Electrical Clock Recovery

Features & Benefits
* Electrical Clock Recovery for:

* Enumerated Bit Rates between 50 Mb/s and 12.6 Gb/s
* Continuously Variable Rates from 100 Mb/s to 12.5 Gb/s Enables Support for Current, Emerging, and Future Bit Rate Needs
* High Jitter Tolerance, Slow Slew Rate Tolerance for Recovering Clocks from Stressed, Degraded, or Spread-spectrum Clocked Signals
* Excellent Time Base Stability and Ultra-low Residual Jitter (as low as 250 fsRMS) for Best Measurement System Fidelity
* Unequaled PLL Bandwidth and Roll-off Shape Control (Tunable loop bandwidth of 100 kHz to 12 MHz) Enables Control Required by Many Compliance Standard Tests
* Clean 50 O Path for the Best Signal Acquisition Fidelity Applications
* High-speed Serial Data Link and Device Characterization for Computer, Communications, and Consumer Applications
* Compliance Testing of Electrical Signaling
* High-speed Optical Communications Testing
* Jitter, Noise, BER, and Signal Impairment Analysis
* Testing of Frequency Agile or Multirate Devices