16753A 68 Channel 600 MHz State, 4 GHz Timing Logic Analyzer Module

The Keysight 16753A state and timing analysis module with 1M memory, delivers the performance and capabilities you need to debug and validate digital systems using today’s new high-speed system interconnects. The innovative ‘eye scan‘ mode in the 16753A enables you to examine eye diagrams on multiple circuit nodes simultaneously, for a rapid, comprehensive view of signal integrity. Another feature, ‘eye scan‘ automatically adjusts the position of the data valid window on every channel independently, ensuring the most reliable data capture on high-speed interconnect and buses.
Here are the key features and specifications of the Keysight 16753A state and timing analysis module:
State analysis up to 600 MHz on all channels
Memory depths from 1 M to 64 M
4 GHz timing zoom (simultaneous timing analysis on all channels) with 64 K memory depth
1.2 GHz, 128 M deep memory timing analysis on half channels
‚Eye scan‘ feature
Low-capacitance, high-reliability, high-density probing
Differential or single-ended inputs
Reliable synchronous state sampling
Keysight’s exclusive ‚eye finder‘ technology 68 channels per module, up to 340 channels by combining modules